Automatic local oscillator frequency stabilization process in radio receivers employing a wide-band tunable local dielectric-resonator oscillator and associated device

ABSTRACT

There is described a stabilization process for the local oscillator frequency in wide-band tunable DROs employed in receivers of a digital microwave radio link. A microprocessor, already provided for normal operation control, cyclically reads the control voltage of a VCO inserted in PLL which reconstructs an intermediate frequency carrier used to coherently demodulate the received signal. The voltage read is compared with an optimal reference value by taking an error signal which controls a varicap diode of the DRO for tuning correction. With each reading, the optimal value can be modified on the basis of temperature data supplied by a heat sensor to cancel the effect of temperature on the reference.

This application is the national phase under 35 U.S.C. §371 of prior PCTInternational Application No. PCT/EP 96/02823 which has an Internationalfiling date of Jun. 27, 1996 which designated the United States ofAmerica, the entire contents of which are hereby incorporated byreference.

DESCRIPTION

The present invention relates to the field of radio signal transmissioncharacterized by coherent demodulation, and specifically to a processand device for automatic local oscillator frequency stabilization inradio receivers employing a wide-band tunable local dielectric-resonatoroscillator.

Coherent demodulation is used in a large part of both public and privateprofessional transmission systems, among which an important place isreserved certainly for microwave radio links and satellitecommunications systems.

FIG. 1 shows a typical block diagram for a transmitter and a receiverconnected to the same antenna and which find use in the above mentionedprofessional systems. The diagramming is quite general and can representany system, whether analog or digital, characterized by coherentdemodulation.

With reference to FIG. 1 there is seen a block 1 at whose input arrivesa base band signal S_(T) to be transmitted. The signal S_(T) is in mostcases a complex signal obtained by appropriately multiplexing multipleelementary signals coming e.g. from multiple telephone channels. Tomaintain greater generality in the discussion, in FIG. 1 a multiplexingblock for these channels is not shown. The block 1 comprises circuitswhich perform on the signal S_(T) known operations such as, for example,filtering and which are preliminary to the modulation operations of acarrier, frequency conversion and subsequent transmission. The signalfrom block 1 reaches a first input of a modulator 2 which uses the inputsignal as a modulating signal for an intermediate frequency oscillationf_(i) present at a second input of this block. The modulated signal fromblock 2 reaches in turn an input of a frequency converter 3(up-converter) to which arrives also a frequency oscillation f_(olt)generated by a local transmission oscillator 4. The block 3 convertsthis modulated signal into a radiofrequency transmission signal. Thesignal from block 3 is amplified by a linear radiofrequency poweramplifier, represented by block 5, and then coupled to a first gate of adirectional coupler represented by block 6. A second gate of thedirectional coupler 6 is coupled to an antenna 7 while a third gatethereof is coupled to a radiofrequency receiving amplifier 8characterized by low noise-figure value. On the paths from block 5 toblock 6 and therefrom to block 8 are respectively inserted a band-passtransmission filter and a band-pass receiving filter, not shown in thefigure, generally with different center-band frequencies.

The directional coupler 6 and the respective filters (duplexers) allowradiation by the antenna 7 of the transmission signal without disturbingthe reception path and simultaneous correct routing of a receivingsignal received by the antenna 7 toward the amplifier 8. The signal fromthe amplifier 8 reaches an input of a second frequency converter 9(down-converter) to which also arrives a frequency oscillation f_(olr)generated by a local receiving oscillator 10. The block 9 converts tointermediate frequency f_(i) the radiofrequency receiving signal presentat its own input. The signal from block 9 reaches a demodulator 11 whichreturns it to base band, utilizing for this purposes an intermediatefrequency carrier reconstructed locally starting from the carrier datacontained in the signal from the converter 9, after appropriateintermediate frequency filtering by a filter not shown in FIG. 1.

The base-band signal at the output of the demodulator 11 reaches a block12 which performs on the signal known operations designed to restore areceived signal S_(R) which is a faithful copy of the signal S_(T)originally transmitted. By analogy with the above remarks concerning thesignal S_(T), the signal S_(R) must be demultiplexed into the individualcomponent signals. Again in this case, to maintain greater generality indiscussion, a demultiplexing block for these signals is not shown, whilefor the sake of simplicity a processing block which keeps the operationof the various blocks of FIG. 1 under control is not shown, althoughpresent.

As known, the operation performance of professional transmission systemsincluding the equipment of FIG. 1 is generally subject to very severespecifications, observation of which implies often costly and cumbersomecircuitry solutions. For example, for the transmission amplifier 5 goodlinearity even at the highest amplification values is required, for thereceiving amplifier 8 low input stage noise is required, and for thelocal oscillators 4 and 10 high spectral purity and optimal long-termstability of the generated frequency are required. In addition, a highlyappreciated feature in receivers is the ability to change on a wide bandthe local oscillator frequency, to be able to select the desiredfrequency range.

In the older transmission systems all the blocks of FIG. 1 were providedin analog technology and the transmission carrier was modulated withcontinuity of the analog signal S_(T). In cases of multiplexing multipletelephone channels on a single transmission means, multiplexing tookplace with frequency division (FDM) and involved high production costs.

With the success of digital electronics it has become more convenient toappropriately digitize the starting analog signals, where possible, andapply numerical techniques (DSP) to the signals thus obtained. In casesof digital signal multiplexing, there is used the known time divisiontechnique (TDM) and in this case the modulating signal S_(T) consists ofa bit string. Modulation techniques have also evolved to become bettersuited to the peculiar characteristics of such a modulating signal. Inparticular there has been progress from continuous transmission carriermodulations to discrete modulations, among which are recalled PSK andQAM and their variants. These modulations, also known as digitalmodulations, are again included in the engineering field where theinvention falls because they also assume coherent demodulation. Indeed,the demodulator 11 includes a voltage controlled oscillator (VCO)inserted in a phase-locked loop (PLL) for reconstruction of anintermediate-frequency carrier used for demodulation.

When adopting digital modulation, the base-band operations carried outby blocks 1 and 12 and the intermediate frequency operations carried outby the modulator blocks 2 and the demodulator 11 change radically, whilethe radiofrequency operations carried out by the blocks 3, 4, 5, 6, 7,8, 9 and 10 remain unchanged.

Thanks to the high operating speed reached by digital circuits at thepotentials offered by computer-aided design it is possible today toproduce the base band, modulator and demodulator blocks by means of asingle large scale integrated circuit to obtain a considerable reductionof size and greater economy and reliability of the equipment.

For obvious reasons it is not possible to extend the same advantages tothe remaining blocks, which can only be analog, and thus considerablyaffect overall equipment cost. Accordingly, all those technicalsolutions which allow economies in the analog part, especially ifoperating in the microwave field, are attractive.

It is in this direction that the invention which is the subject of thepresent invention moves, in particular to the achievement of advantagesin the realization of local microwave oscillators. As mentioned above,what is asked of a local oscillator is frequency stability, spectralpurity, ample tuning interval, small size and low cost; these arecharacteristics difficult to achieve together.

An example of local microwave oscillators in accordance with the priorart consists of the use of a high-Q dielectric resonator DR fordetermination of the oscillation frequency. The advantages of thissolution are good stability of the generated frequency, low phase noise,small size and low production cost. On the other hand these oscillators,called hereinafter DROs, exhibit generally rather narrow tuningintervals and it is thus necessary to replace the DRs when it is desiredto change the tuning range.

A second embodiment consists of the use of a frequency synthesizer forgenerating the local oscillator frequency. With this it is possible tomeet the requirements of stability and purity mentioned above and havean ample tuning interval at the same time. The great advantage ofsynthesizers is just that of covering different frequency ranges withoutdifficulty; on the other hand they are rather complex and costly,especially in microwave operation.

They are known in the art of wide-band tunable DROs, also termed`disbandable`, in which tuning is changed by rotation of a screwprovided for this purpose. It might be thought to use these latter DROsto obviate the shortcomings resulting from the limited tuning range ofthe DROs of the first example. This way it would be possible to changefrequency range merely by changing the position of the tuning screw.Unfortunately these latter DROs generate an oscillation frequency whoselong-term stability is decidedly low, this means that because of heatdrift and aging the frequency generated shifts slowly from the initialvalue until it passes outside the established limits. This factconstitutes a serious shortcoming such as to prejudice the use ofdisbandable DROs in professional transmission systems. But it would bepossible to obviate the shortcomings resulting from the poor long-termstability of the shiftable DROs by linking their frequency to the muchmore stable frequency generated by a reference quartz oscillator. Inthis case there would reappear the same shortcomings as those of thefrequency synthesizers.

U.S. Pat. No. 4,712,078 relates to a digital compensation circuit forimproving the temperature stability of dielectric resonator oscillators.The frequency drift in a dielectric resonator is compensated by acorrelated phase shift, in response to a temperature sensor measuringthe ambient temperature. This document exhibits structural detailsimplementing temperature detection digitizing (A/D, D/A) and processingthe measured temperature values and generating a control signal independence thereof, which are also used in the present application.

Accordingly the purpose of the present invention is to overcome theabove mentioned shortcomings and provide an automatic frequencystabilization process for the local oscillator frequency in radioreceivers employing a local oscillator with wide-band tunable dielectricresonator.

These objects are solved, by the present invention.

The features of the present invention which are believed to be novel areset forth with particularity in the appended claims.

It is easy to verify that the process which is the object of the presentinvention supplies to the receiver implementing it all the abovementioned advantages deriving from use of a disbandable DRO withoutinheriting its shortcomings. The above mentioned advantages are alsoachieved at virtually no cost because the microprocessor implementingthe process is normally already present to control operation of thevarious circuits and equipment. Another but not negligible advantage isneutralization of any instability in the transmitter frequency.

Further purposes and advantages of the present invention are clarifiedin the detailed description of an embodiment thereof given below by wayof nonlimiting example with reference to the annexed drawings wherein:

FIG. 1 shows a block diagram of a transmission system in accordance withthe prior art,

FIG. 2 shows a block diagram of a transmission system in accordance withthe present invention, and

FIGS. 3.a and 3.b show a flow chart of a program controlling theoperation of a microprocessor indicated by PROC in FIG. 2.

FIG. 1 is fully described in the introductive part with reference to theprior art.

With reference to FIG. 2, in which the elements common to FIG. 1 areindicated by the same symbols, it is seen that the transmission systemshown there differs from the known one of FIG. 1 mainly by the presenceof a control block CONTR and a sub-block 13 placed in the demodulator11. The block CONTR includes a block PROC, two analog/digital convertersA/D and a digital/analog converter D/A. The sub-block 13 represents atemperature sensor and the block PROC a general purpose microprocessorwith the additional hardware necessary for operation and additionalinterfacing. The sensor 13 supplies to a first converter A/D a voltageV_(st) proportionate to the temperature detected in the demodulator 11.The digitized value of V_(st) is read by the microprocessor PROC. At asecond converter A/D arrives a voltage V_(vco) generated in thedemodulator 11 for control of a VCO inserted in a PLL. The digitizedvalue of voltage V_(vco) is read by the microprocessor PROC. The block12 associated with the base band operations on the demodulated signalsupplies an alarm bit LOF to the microprocessor PROC. The latterprocesses the data received and supplies to the converter D/A a digitalsignal, converted thereby into a voltage V_(dro) which reaches a controlinput of the local receiving oscillator 10.

The example of FIG. 2 refers to a digital microwave radio link whoseoperation is explained below with particular reference to blocks 1, 2,11 and 12, which are affected by the digital signal, and to the controlblock CONTR which is the one more fully involved in the presentinvention.

The input signal S_(T) is a digital signal coming from a SynchronousDigital Hierarchy (SDH) multiplex and specifically it is a sub-STM-1signal with 51.84 Mb/s.

For further information, the characteristics of SDH signals aredescribed in CCITT Recommendation G.707, G.708 and G.709.

The operations performed by the block 1 on the input signal S_(T)consist mainly of conversion of the line code and addition of anyservice channels.

The modulator 2 adds to the digital signal supplied it by the block 1some redundancy bits obtained by appropriately coding the input bitstring to correct any errors in the demodulated signal. The redundantsignal is filtered digitally and optimally for shaping of thetransmission channel and then used to modify an intermediate frequencycarrier f_(i) in accordance with a 16-BCM (Block Code Modulation)diagram, virtually based on a QAM modulation. The value of f_(i) is theclassical value of 70 MHz generated by an independent reference quartzoscillator. The band occupied by the modulated signal is 28 MHz.

The local transmission oscillator 4 is a high-Q DRO tuned to thecenter-band frequency of the channel to be transmitted ±70 MHz. Thetransmission signal emerging from the frequency converter 3 can be setwithin a range of frequencies between 7.1 GHz and 8.5 GHz by anappropriate choice of the DRO 4.

Regarding the reception part, the only one that really concerns thepresent invention, it is specified that the local receiving oscillator10 is a DRO of known type possessing a tuning interval of 350 MHz, suchas to allow selection of twelve different channels by rotation of atuning screw. The frequency oscillation f_(olr), in addition tomanually, can be changed within a narrow range of frequencies evenelectronically by acting on the bias voltage of a varicap diode. Thewidth of the tuning interval allowed by the varicap diode is a few MHz,which does not constitute a problem for the purposes of the inventionsince electronic tuning is used for introducing a correction in thetuning of a channel already selected manually.

As already mentioned, in the absence of appropriate corrections made bythe block CONTR, the heat variations in the environment in which isinserted the DRO 10 could cause excessive variation of the localoscillator frequency f_(olr). Due to the effect of the frequencyconversion the same variations would be found in the value of theintermediate frequency carrier f_(i) emerging from the frequencyconverter 9 and cause serious shortcomings in the demodulation.

As known, reconstruction of the intermediate frequency carrier by thedemodulator 11 takes place on the basis of the carrier informationcontained in the f_(i) signal emerging from the converter 9, afterappropriate intermediate frequency filtering by a filter not shown inFIG. 2. The local carrier is used by the demodulator to bring thereceived signal back into base band. After this, in the demodulator 11the synchronisms for reading of the bits are recovered. On the bitsread, redundancy is examined and errors are corrected.

The block 12 receives the digital signal processed by the demodulator11, seeks the frame synchronism and extracts the service channels, andfinally converts the bit string into the line code, restoring theoriginal sub-STM-1 signal at 51.84 Mb/s. If for any reason it were notpossible to synchronize the frames, the block 12 would supply an alarmbit denominated Loss of Frame (LOF) to signal the loss of framesynchronism.

In light of the above remarks it appears clear that the seriousshortcomings caused by excessive variations in the frequency f_(olr) arethe possible loss of locking of the PLL included in the demodulator 11,and the distortion of the intermediate frequency signal caused bydeviation of the f_(i) carrier with respect to the center-band value ofthe intermediate frequency filter.

The processing done by the microprocessor PROC sets out to result in theabove mentioned appropriate corrections designed to hold constant thevalue of the frequency f_(olr) with temperature variation and aging.Operation of the microprocessor PROC is controlled by a program whoseflow chart is shown in FIGS. 3.a and 3.b, which are discussed belowafter introduction of some remarks which justify the use of thetemperature sensor 13.

Considering operation of the PLL belonging to the demodulator 11, thephase error is null after locking and at the control input of the VCOthe voltage V_(vco) has taken form. Under temperature conditionsconsidered normal (25° C.) this voltage assumes an optimal value V_(ott)such that VCO, virtually excluded from the PLL, would oscillate freelyat a frequency of 70 MHz. The above mentioned value V_(ott) is taken asindicative of a frequency reference for the subsequent processing of thestabilization process. This means that a deviation of the actual valueof V_(vco) from V_(ott) constitutes an error signal E indicating theamount of the frequency deviation between f_(i) and the nominal value of70 MHz due to the effect of temperature or aging or, in a fullyequivalent manner, deviation of f_(olr) from its optimal value. This isstrictly true only if V_(ott) does not depend in turn on temperature,but that is not so since the dependence exists due to the heat effect onoperation of the various components and circuits making up the PLL. Inconclusion, it will be V_(ott) =V_(ott) (T).

In practice what needs to be done to neutralize the temperature effecton V_(ott), and thus keep unchanged the previous meaning of the error E,is to appropriately modify the initial value of V_(ott) with temperaturechange. It is just the function of the temperature sensor 13 to supplythe necessary information to the microprocessor PROC for correction ofV_(ott), after which the correction of the carrier f_(i) will also becongruent.

With reference to FIGS. 3.a and 3.b there is now discussed in detail theautomatic local oscillator frequency stabilization process which is theobject of the present invention, and whose execution is preceded byrotation of the tuning screw of the DRO 10 until it reaches a positioncorresponding to a channel to which it is desired to tune. The processdistinguishes between three different operating conditions designated`start`, `normal` and `alarm`, to which correspond different executionstrategies.

After the start, in the step F1 the microprocessor initializes someregisters and appropriate memory zones used later, in particular theinitial value of V_(ott) is memorized and the content of a counter COUNTis zeroed. The program then enters the `start` condition consisting ofthe steps from F2 to F8 in which:

in step F2 is generated a succession of values of V_(dro) whose behaviorin time constitutes a scale of discreet values such as to approximate avoltage ramp; the voltage V_(dro) acts on the varicap diode included inthe DRO 10 and causes a variation in the frequency f_(olr) of ±2 MHzaround the central operating value;

in the following step F3 is examined the logical condition of the alarmLOF; as long as the alarm is present it means that the PLL of thedemodulator 11 has not yet reached the lock and steps F2 and F3 are thusrepeated cyclically until the alarm disappears and the PLL is locked. Atthis point starts a cycle of iterative optimization of the localoscillator frequency f_(olr) as a function of operating temperature. Ina first approximation, in the program it is reasonably assumed that forthe entire duration of the above mentioned cycle the PLL maintains thelock.

The cycle starts with a step F4 in which the microprocessor reads thevoltage V_(st) supplied by the heat sensor 13 and uses it to correct theV_(ott) previously memorized to obtain an optimal correct value suchthat, under actual temperature conditions the VCO, virtually excludedfrom the PLL, would oscillate freely at the frequency of 70 MHz;

in step F5 the value of V_(vco) is read and compared with the valueV_(ott) corrected in the preceding step, to obtain the error signal E;

in step F6 the absolute value of error E is compared with a positivevalue E_(min) small enough that the voltages V_(ott) and V_(vco) can beconsidered near equal, and consequently the value of the carrier f_(i)can be considered approximately equal to 70 MHz. In practice, E_(min)corresponds to the absolute value of one or the other of the two limitsof the continuous interval of values of the voltage V_(vco) to which ismade to correspond the least significant bit in the conversion fromanalog to digital. If in this step the absolute value of the error Eexceeds E_(min), the voltage V_(dro) must be corrected;

in step F7 is calculated an increase ΔV to be made to the voltageV_(dro) ; in conformity with the strategy used to correct V_(dro), theincrease ΔV will be an appropriate function of the error E. The functionchosen has a very simple form i.e.: ΔV(E)=±sign(E)=±1, the unit valuecorresponding to the least significant bit of the word representingdigitally the voltage V_(dro) ; the choice of the sign ± of the functionΔV(E) depends on the relationship between V_(dro) and V_(vco) and in anycase the correction made to V_(dro) must result in a reduction of theabsolute value of the error E. The small size of the correction made hasthe advantage of greater precision, but in case of big and fast changesin f_(lor) it would force multiple iterations of the cycle; however thiseventuality is never generated by heat and aging drift phenomena, whichare very slow by definition;

in step 8 the ΔV increase is added algebraically to the voltage V_(dro)and the program returns to step F4 to complete another iteration of theoptimization cycle;

if in step F6 of the iteration the module of the error E is less thanE_(min) it means that the total correction made to the local oscillatorfrequency f_(olr) is sufficient and in this case the processing for the`start` condition terminates and the processing for the `normality`condition initiates.

Before continuing the explanation of the program it is appropriate tomake some remarks on the timing of the various operations thus farexecuted. Specifically, the linking cycle consisting of the indefiniterepetition of steps F2 and F3 has a duration of several seconds. Thelength of the duration is a result of the impossibility of subjectingthe PLL of the demodulator to a frequency sweep 4 MHz wide in a time tooshort with respect to the typical PLL locking times, because otherwisethe locking ability itself could be compromised. As regards thestabilization cycle of the f_(olr), the duration of each iteration isapproximately 80 ms, which corresponds to the sampling interval of thevoltages V_(st) and V_(vco). The microprocessor treats the abovementioned voltages digitally before using them in the respective stepsF4 and F5 by appropriately averaging the V_(st) values and digitallyfiltering the V_(vco) to eliminate the fast variations resulting fromthe carrier recovery algorithm. For the sake of brevity these operationsare not shown in FIGS. 3.a and 3.b. Altogether, the two cycles discussedup to this point require several seconds of processing but this does notaffect the characteristics of the transceiver of FIG. 2 since this waitis necessary only during the equipment starting phase and after a longpersistence (on the order of a few minutes) of the alarm LOF.

The processing which concerns the `normality` condition includes all theadditional steps excepting steps F10 and F12, which belong to the`alarm` condition, while the steps F9 and F11 belong to both the abovementioned conditions.

Resuming from step F6, the program traverses initially step F9 in the`no` direction;

then in step F11 there is performed a test of the alarm LOF, whosepresence conducts the program in the `alarm` condition, abandoning the`normality` condition;

in the absence of LOF, a counter COUNT is zeroed in F13, an operationwhich is significant only after return to the `normality` condition froma previous `alarm` condition;

there are then performed two steps F14 and F15 to determine the error E,identical to steps F4 and F5 respectively;

the program then enters step F16 in which the absolute value of theerror E, calculated in F15, is compared with a positive thresholdSEM>E_(min) under which no action is undertaken to bring the error Eback to a value less than E_(min). The threshold SEM represents theerror E generated by a deviation, higher or lower, of 1000 ppm in thevalue of the intermediate frequency carrier f_(i) with respect to thenominal value of 70 MHz; essentially the tolerated deviation is ±70 KHz;

if in F16 the absolute value of the error E is less than or equal to thethreshold SEM, it means that it is tolerable; in this case the programreturns to F9 and repeats indefinitely the previous cycle consisting ofsteps F9, F11, F13, F14, F15 and F16 in which the voltages V_(vco) andV_(st) are monitored continually and the value of V_(ott) is updated.The test on the presence of the alarm LOF performed in F11 allowsmonitoring continuously the state of linking or unlinking of the PLLincluded in the demodulator 11 for the entire duration of the`normality` condition;

if in F16 the voltage V_(vco) has deviated significantly from the valueV_(ott), there is performed a zeroing cycle of the error E whichincludes steps F17, F18, F19, F20 and F21, which are identical with theinitial optimization cycle of the frequency f_(olr) consisting of stepsF4, F5, F6, F7 and F8; the above mentioned zeroing cycle allowscentering of the intermediate frequency carrier f_(i) at the value of 70MHz without generating any error on the data flow; this is possiblethanks to the sufficient band width of the PLL which permits absorptionof the jumps of the frequency f_(i) caused by shifting of the frequencyf_(olr). As a result of the fact that the jumps of the frequency f_(i)can be caused even by changes in the radiofrequency transmissioncarrier, it is inferred that in this case, too, the carrier f_(i) iscentered at the value of 70 MHz, neutralizing the transmitter frequencyinstability.

Returning to the test completed in F11, if the alarm LOF is presentthere, the program enters the `alarm` condition and in F12 it increasesby one unit the content of the counter COUNT which previously was null.As mentioned above, the main cause of generation of the alarm LOF is theloss of locking of the PLL of the demodulator 11, even for reasons notnecessary dependent upon operation of the DRO 10;

in the following step F9 of the alarm cycle, consisting of steps F11,F12 and F9, there is performed a test on the content of COUNT to checkwhether a maximum value COUNTMAX designed to establish the maximumduration of the above mentioned cycle, typically a few minutes, has beenexceeded;

if in F9 the condition is found, the alarm cycle terminates and thecontent of COUNT is zeroed in F10, after which the program returns to F2for repetition of the processing for the `start` condition. This is madenecessary because, despite the expired wait time, the PLL has not yetmanaged to recover the locking;

if in F9 the condition is not found true it means that the wait time hasnot ended, in this case the test for the presence of the alarm LOFperformed in the following step F11 gives rise to the possibility of apremature exit from the alarm cycle and return to the `normality`condition with zeroing of COUNT, since in the meantime the PLL hasmanaged to recover the locking.

In view of the above, the alarm cycle is only a check of the persistenceof the alarm LOF, eventually performed during performance of the`normality` step. It was introduced to prevent the microprocessor PROCfrom shifting the frequency f_(olr) even in those cases where the alarmLOF condition was caused by phenomena independent of heat drift or byaging of the local oscillator 10.

What is claimed is:
 1. Automatic local oscillator frequencystabilization process in radio receivers employing a local oscillatorwith a wide-band tunable dielectric resonator providing an oscillationfrequency to an intermediate frequency converter of the receivingsignal, the intermediate frequency supplied by said intermediatefrequency converter reaching a demodulator including a VoltageControlled Oscillator (VCO) inserted in a Phase-Locked Loop (PLL) forreconstruction of an intermediate frequency carrier (f_(i)) used fordemodulation, with said local oscillator including manual and electronictuning means acting on which a desired receiving channel is tunedinitially, comprising an initial step of memorization of a voltageV_(ott) considered optimal for control of said VCO, with said optimalvalue being such that if used for control of the VCO virtually excludedfrom the PLL and under nominal temperature conditions it would make itoscillate freely at the nominal value of said intermediate frequency(f_(i)); and the following steps repeated cyclically:a) conversion intodigital form of the present value of the VCO control voltage (V_(VCO));b) comparison of said present value (V_(vco)) of the VCO control voltagewith said optimal value V_(ott) to obtain an error signal indicative ofa frequency deviation of said intermediate frequency carrier (f_(i))from said nominal value thereof; and c) comparison of the absolute valueof said error signal with art appropriate positive threshold theexceeding of which generates a criterion valid for inclusion in a cycleof a following step, d) in which said error signal is converted intoanalog form and used to command an electronic tuning change of saidlocal oscillator with the direction and amount of said change being suchas to cancel out said error signal.
 2. The automatic local oscillatorfrequency stabilization process in accordance with claim 1, wherein saidelectronic tuning change performed in step d) is obtained by adding to avoltage (V_(dro)) controlling said electronic tuning means included insaid local oscillator an increase ΔV which is a function of said errorsignal.
 3. The automatic local oscillator frequency stabilizationprocess in accordance with claim 1 or 2, wherein:said cyclic repetitionof steps a), to d), step a) is preceded by a step a') of acquisition ofan actual temperature value near said VCO and by a step a") ofcorrection of said optimal voltage value V_(ott) as a function of saidacquired temperature value, to obtain a new optimal value which, if usedfor control of the VCO virtually excluded from the PLL and under theactual temperature conditions, it would make it oscillate freely at afrequency corresponding to said nominal intermediate frequency (f_(i));and in the step b) said present value (V_(vco)) of the VCO controlvoltage is compared with said new optimal value to obtain said errorsignal.
 4. The automatic local oscillator frequency stabilizationprocess in accordance with any one of the above claims, wherein saidpositive threshold used in step c) takes a first value on persisting ofa `start` condition which first causes seeking of the locking of saidPLL and then optimization of the value of said intermediate frequencycarrier (f_(i)), with said `start` condition beginning with energizingof said radio receiver or with an expiration of a maximum time duringwhich said PLL is not in a locking condition; said positive thresholdtaking a second value higher than said first value on persisting of acondition of `normality` replacing said `start` condition or replacingan `alarm` condition generated by loss of locking of said PLL due tocessation thereof.
 5. The automatic local oscillator frequencystabilization process in accordance with claim 4, wherein passing insaid `normality` condition of said second value of said positivethreshold results in exchange of said second with said first thresholdvalue, which is maintained until in the comparison performed in saidstep c) said absolute value of the error signal exceeds said firstthreshold value, said second threshold value being restored uponoccurrence of the contrary case.
 6. The automatic local oscillatorfrequency stabilization process in accordance with claim 4 or 5,wherein:said first value of said positive threshold is equivalent to theabsolute value of a minimum error signal such that it can be consideredapproximately equal to said optimal voltage V_(ott) and the VCO controlvoltage (V_(vco)); said `normality` condition replaces said `start`condition when said absolute value of the error signal is reduced belowsaid minimum error signal; said second value of said positive thresholdis equivalent to said absolute value of an error signal generated by ashift, considered tolerable, of the value of said intermediate frequencycarrier (f_(i)) with respect to said nominal value thereof; and in that,during said `alarm` condition, said cyclic execution of steps a), to d)is suspended and the passing, or not, of said maximum time is appraised,the recovery of the locking of said PLL before expiration of saidmaximum time resulting in return to said `normality` condition.
 7. Theautomatic local oscillator frequency stabilization process in accordancewith claim 6, wherein said minimum error signal corresponds to one orthe other of two limits of a continuous interval of values of said VCOcontrol voltage (V_(vco)) to which is made to correspond to a leastsignificant bit in the analog to digital conversion.
 8. The automaticlocal oscillator frequency stabilization process in accordance withclaim 2 or 7, wherein said increase ΔV is expressed by the function:ΔV(E)=±sign(E)=±1, where E is said error signal.
 9. The automatic localoscillator frequency stabilization process in accordance with claim 8,when said frequency depends on 7, and wherein the unit value ±1 of saidfunction ±sign(E) corresponds to said least significant bit of the wordrepresenting digitally said VCO control voltage (V_(vco)).
 10. Theautomatic local oscillator frequency stabilization process in accordancewith any one of the above claims and wherein it is performed by saidmicroprocessor (PROC) already present for operation supervision.
 11. Anautomatic stabilization device for a local oscillator frequency in radioreceivers comprising a local oscillator with a wide-band tunabledielectric resonator providing the oscillation frequency to anintermediate frequency converter of a receiving signal, the intermediatefrequency supplied by said intermediate frequency converter reaching ademodulator including a Voltage Controlled Oscillator (VCO) inserted ina Phase-Locked Loop (PLL) for reconstruction of an intermediatefrequency carrier (f_(i)) used for demodulation, and a microprocessor(PROC) for operation supervision; with said local oscillator includingmanual and electronic tuning means adjusting which a desired receivingchannel is initially tuned, comprising:means of memorizing a voltagevalue V_(ott) considered optimal for control of said VCO, with saidoptimal value being such that if used for control of the VCO, virtuallyexcluded from the PLL and under nominal temperature conditions, it wouldmake it oscillate freely at the nominal value of said intermediatefrequency (f_(i)); means of analog-digital conversion of the presentvalue of the VCO control voltage (V_(vco)); processing means (PROC) forgeneration of change of a numerical magnitude representative of acontrol voltage (V_(dro)) for said electronic tuning means; and saidprocessing means (PROC), a) acquire at preset times the present valuesof said VCO control voltage (V_(vco)) and compare them with said optimalmemorized value V_(ott) to obtain an error signal indicative of thedeviation in frequency of said intermediate frequency carrier (f_(i))from said nominal value thereof, and b) compare the absolute value ofsaid error signal with an appropriate positive threshold the exceedingof which results in a change in said control voltage (V_(dro)) of saidelectronic tuning means with the direction and amount of said changebeing such as to cancel out said error signal.
 12. The automatic localoscillator frequency stabilization device in accordance with claim 11,further comprising a means of acquisition of the actual temperaturevalue near said VCO and of transfer (A/D) to said processing means(PROC) to correct said memorized optimal voltage value V_(ott) andobtain a new optimal value V_(ott) which, if used to control the VCO,virtually excluded from the PLL and under actual temperature conditions,would cause it to oscillate freely at a frequency corresponding to saidnominal value of the intermediate frequency (f_(i)).
 13. The automaticstabilization device for the local oscillator frequency in accordancewith claims 11 or 12, wherein said processing means (PROC) determinesaid change in the control voltage (V_(dro)) of said electronic tuningmeans, adding to an existing voltage value an increase ΔV which is afunction of said error signal.
 14. The automatic stabilization devicefor the local oscillator frequency in accordance with claims 11 to 13,wherein:said appropriate positive threshold used by said processingmeans (PROC) corresponds, until it is exceeded, to the absolute value ofan error signal generated by a shifting, considered tolerable, of thevalue of said intermediate frequency carrier (f_(i)) with respect tosaid nominal value thereof; wherein upon passing of said threshold thethreshold is switched into a least significant bit of the wordrepresenting digitally said present value of the VCO control voltage(V_(vco)); and wherein said switched threshold returns to the previousvalue upon zeroing of said error signal.
 15. The automatic stabilizationdevice for the local oscillator frequency in accordance with claims 11to 14, wherein said processing means is formed by said microprocessor(PROC) already present for operation supervision.